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3.4 DC Power Supplies, Filter Networks, and Voltage Regulators

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ACMA Amateur Radio Advanced Recognition Certificate - Theory Exam

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1 Chapter 1: DC Theory, Circuit Laws & Passive Components

1.1 DC Circuit Analysis, Ohm's Law, and Kirchhoff's Laws 1.2 AC Fundamentals, Sine Waves, Peak, RMS, and Phase Relationships 1.3 Inductance, Capacitance, Reactance, and Time Constants

2 Chapter 2: Impedance, Resonance & Passive Filters

2.1 Complex Impedance, Phasors, and AC Circuit Analysis 2.2 Series and Parallel LC Resonance and Q Factor 2.3 Passive Filters, Cutoff Frequency, and Attenuator Pads

3 Chapter 3: Semiconductor Devices & Power Supplies

3.1 Semiconductor Diodes, Zener Regulators, and Rectifier Circuits 3.2 Bipolar Junction Transistors, FETs, and Operational Amplifiers 3.3 Thermionic Valves (Vacuum Tubes) and High-Power Linear Amplifiers 3.4 DC Power Supplies, Filter Networks, and Voltage Regulators

4 Chapter 4: Oscillators & Frequency Synthesis

4.1 RF Oscillators, LC Tank Topologies, and Frequency Stability 4.2 Phase-Locked Loops (PLLs) and Frequency Synthesisers 4.3 Direct Digital Synthesis (DDS), SDR Architectures, and Digital Filter Topologies

5 Chapter 5: RF Amplifiers & Linearity

5.1 Classes of Amplification, Conduction Angles, and Operating Efficiency 5.2 RF Power Amplifiers, Push-Pull Topologies, and Output Matching 5.3 Amplifier Stability, Neutralisation, and Intermodulation Distortion

6 Chapter 6: Modulation & Demodulation

6.1 Amplitude Modulation, Double Sideband, and Single Sideband (SSB) 6.2 Frequency Modulation, Phase Modulation, and FM Detectors 6.3 Digital Modulation Modes, Spectral Efficiency, and Weak-Signal Protocols

7 Chapter 7: Transmitters, Mixers & Receivers

7.1 RF Mixers, Frequency Translation, and Intermodulation 7.2 Transmitter Architectures, CW Keying, and Output Filtering 7.3 Superheterodyne Receiver Design, IF Selection, and Image Rejection 7.4 Receiver Performance Specifications, Dynamic Range, and Selectivity

8 Chapter 8: Transmission Lines & Waveguides

8.1 Transmission Line Characteristics, Impedance, and Velocity Factor 8.2 Standing Waves, Reflection Coefficient, SWR, and Return Loss 8.3 Resonant Line Sections, Quarter-Wave Transformers, and Stubs

9 Chapter 9: Impedance Matching & Baluns

9.1 Lumped-Element Matching Networks and Antenna Tuning Units 9.2 Baluns, Ununs, and Common-Mode Current Choking 9.3 Feedline Losses, High-SWR Stress, and Coaxial Installation Practice

10 Chapter 10: Practical Antennas & Arrays

10.1 Resonant Dipoles, Inverted-Vs, and Multiband Wire Antennas 10.2 Quarter-Wave Verticals, Ground Systems, and Radiation Efficiency 10.3 Parasitic Arrays, Yagi-Uda Antennas, and Quad Arrays 10.4 Antenna Gain, Aperture Antennas & Horns, ERP/EIRP, Radiation Patterns

11 Chapter 11: Radio Wave Propagation & Ionospheric Mechanics

11.1 Electromagnetic Wave Fundamentals, Polarisation, and Ground Waves 11.2 The Ionosphere, Solar Radiation, and Solar Cycles 11.3 Critical Frequency, Maximum Usable Frequency, and HF Propagation Paths

12 Chapter 12: VHF/UHF Propagation & Space Communications

12.1 Line-of-Sight, Tropospheric Ducting, and Diffraction 12.2 Sporadic-E, Auroral Scatter, and Trans-Equatorial Propagation 12.3 Amateur Satellites, Doppler Shift, and Earth-Moon-Earth (EME)

13 Chapter 13: Test Equipment & RF Measurements

13.1 Decibels, Power Ratios, and Cascaded Stage Calculations 13.2 RF Power Meters, Directional Couplers, and Dummy Loads 13.3 Multirange Meters, Waveform Diagnostics, Oscilloscopes, and Frequency Counters

14 Chapter 14: Advanced RF Analysis & Diagnostics

14.1 Spectrum Analyser Architecture, Operation, and Spectral Purity 14.2 Antenna Analysers, Vector Network Analysers, and Smith Charts 14.3 Calibrated Signal Generators, Grid Dip Meters, and Component Testing

15 Chapter 15: Electromagnetic Compatibility & Interference

15.1 Sources of Interference, Coupling Mechanisms, and Audio Rectification 15.2 Receiver Susceptibility, Desensitisation, and Front-End Intermodulation 15.3 Practical RFI Suppression, Filter Design, and Bonding Techniques

16 Chapter 16: Electrical, RF & Station Safety

16.1 Biological Effects of RF Energy and ARPANSA Exposure Standards 16.2 Safe Separation Distances, Power Density, and Duty Cycles 16.3 Station Electrical Safety, Battery Hazards, and Safe Headphone Use 16.4 Mast and Tower Construction, Power Line Clearance, and Lightning Protection

3.4 DC Power Supplies, Filter Networks, and Voltage Regulators

Key Takeaways Explain This Topic AI

Power supply smoothing filters convert pulsating DC into steady DC; reservoir capacitors draw current in narrow, high-amplitude spikes, while choke-input filters provide continuous diode conduction and superior voltage regulation.

Peak-to-peak ripple voltage is inversely proportional to filter capacitance and ripple frequency: V_ripple(p-p) ≈ I_L / (f_ripple * C).

Linear regulators use series-pass transistors operating in active mode; while offering zero RF switching noise, they exhibit poor efficiency when dropping large voltages, dissipating P_D = (V_in - V_out) * I_L as heat.

Switched-Mode Power Supplies (SMPS) chop rectified DC at 50 kHz to 1 MHz, utilizing small ferrite transformers to achieve 85% to 95% efficiency, but require robust shielding, filtering, and noise-offset controls to prevent HF receiver interference.

An over-voltage crowbar triggers an SCR across the protected output. Its threshold, response, surge rating and fuse or current-limit coordination must protect the connected equipment during a regulator fault.

Last updated: November 2026

3.4 DC Power Supplies, Filter Networks, and Voltage Regulators

Key Focus: Modern amateur radio transceivers and station accessories require highly regulated, stable, and transient-free direct current (typically 13.8 V 13.8\text{ V} 13.8 V DC at up to 25 A 25\text{ A} 25 A to 30 A 30\text{ A} 30 A ). Understanding smoothing filters, ripple calculations, linear regulators, Switched-Mode Power Supplies (SMPS), EMI mitigation, and crowbar protection circuits is a major component of the Advanced Theory syllabus.

Power Supply Block Architecture

A complete DC power supply transforms raw AC line power ( 230 V RMS 230\text{ V}_\text{RMS} 230 V RMS ​ at 50 Hz 50\text{ Hz} 50 Hz in Australia) into a stable, isolated DC output through five discrete functional stages: +-------------+ +-------------+ +-------------+ +-------------+ +-------------+

  • | 230V Mains |--->| Transformer |--->| Rectifier |--->| Smoothing |--->| Voltage |---> Regulated
  • | AC Input | | (Step-Down) | | Bridge | | Filter | | Regulator | DC Output
  • +-------------+ +-------------+ +-------------+ +-------------+ +-------------+
  • |
  • +-------------+
  • | Protection |
  • | (Crowbar) |
  • +-------------+

Mains Transformer: Steps the AC voltage down (e.g. to 18 V RMS 18\text{ V}_\text{RMS} 18 V RMS ​ for low-voltage transceivers) or up (for valve plate supplies) while providing galvanic isolation between the mains supply and the equipment.

Rectifier: Diode network converting bipolar AC into unipolar pulsating DC.

Smoothing Filter: Reactive network (capacitors and inductors) attenuating AC ripple variations.

Voltage Regulator: Active circuit maintaining constant output voltage despite line voltage swings or load current transients.

Protection Circuitry: Electronic failsafes (crowbars, current limiters, thermal shutoffs) preventing transceiver destruction during component failures.

  • Smoothing Filter Networks and Ripple Mechanics
  • 1. Reservoir Capacitor Action

A reservoir capacitor connected across the rectifier output charges to the peak DC voltage ( V peak = V RMS 2 − 2 V D V_{\text{peak}} = V_{\text{RMS}}\sqrt{2} - 2 V_D V peak ​ = V RMS ​ 2 ​ − 2 V D ​ ) during the brief interval when the transformer voltage exceeds capacitor voltage. When the rectified input waveform falls below the capacitor voltage, the rectifier diodes turn off, and the capacitor discharges into the load resistance ( R L R_L R L ​ ).

Conduction Angle and Surge Current: The diodes conduct in short charging pulses near each voltage crest; their conduction angle depends on capacitance, load and source impedance. Because the full load charge delivered over the entire half-cycle must be replenished during this short window, the repetitive peak diode current ( I peak I_{\text{peak}} I peak ​ ) is many times larger than the average DC load current ( I DC I_{\text{DC}} I DC ​ ). Diodes must be rated to withstand these intense recurring surge currents.

2. Calculating Peak-to-Peak Ripple Voltage

Assuming approximately linear discharge of the reservoir capacitor between conduction peaks, the peak-to-peak ripple voltage ( V ripple(p-p) V_{\text{ripple(p-p)}} V ripple(p-p) ​ ) is given by: V ripple(p-p) ≈ I L f ripple × C V_{\text{ripple(p-p)}} \approx \frac{I_L}{f_{\text{ripple}} \times C} V ripple(p-p) ​ ≈ f ripple ​ × C I L ​ ​

Rearranging to determine the minimum capacitance required for a specified allowable ripple voltage: C ≈ I L f ripple × V ripple(p-p) C \approx \frac{I_L}{f_{\text{ripple}} \times V_{\text{ripple(p-p)}}} C ≈ f ripple ​ × V ripple(p-p) ​ I L ​ ​

where:

I L I_L I L ​ is the DC load current in Amperes.

f ripple f_{\text{ripple}} f ripple ​ is the ripple frequency ( 100 Hz 100\text{ Hz} 100 Hz for full-wave rectification on 50 Hz 50\text{ Hz} 50 Hz Australian mains).

C C C is the reservoir capacitance in Farads.

V ripple(p-p) V_{\text{ripple(p-p)}} V ripple(p-p) ​ is the peak-to-peak ripple voltage in Volts.

  • 3. Filter Topologies Compared CAPACITOR INPUT CHOKE INPUT PI FILTER
  • In+ ----+---+ In+ --[L]--+---+ In+ --+--[L]--+---+
  • | | | | | | |
  • [C] [Load] [C] [Load] [C1] [C2] [Load]
  • | | | | | | |
  • In- ----+---+ In- -------+---+ In- --+-------+---+

Capacitor-Input Filter: Delivers high output voltage (approaching V peak V_{\text{peak}} V peak ​ at light loads), but exhibits poorer voltage regulation (output drops significantly under heavy current) and severe peak diode current pulses.

Choke-Input Filter (L-C Filter): The inductor is placed in series between the rectifier and the capacitor. The inductor opposes sudden changes in current, maintaining continuous current conduction through the diodes over the entire cycle. The DC output voltage equals the average value of the rectified waveform: V DC ≈ 2 V peak π ≈ 0.636 × V peak ≈ 0.90 × V RMS V_{\text{DC}} \approx \frac{2 V_{\text{peak}}}{\pi} \approx 0.636 \times V_{\text{peak}} \approx 0.90 \times V_{\text{RMS}} V DC ​ ≈ π 2 V peak ​ ​ ≈ 0.636 × V peak ​ ≈ 0.90 × V RMS ​

Choke-input filters provide superior voltage regulation under varying load conditions and low peak diode stress. To prevent the filter from behaving as a capacitor-input filter at light loads, the inductor must exceed the critical inductance ( L c L_c L c ​ ): L c ≥ R L ( max ) 3 ω = R L ( max ) 6 π f line ≈ R L ( max ) 942 Henrys (at 50 Hz mains) L_c \ge \frac{R_{L(\text{max})}}{3 \omega} = \frac{R_{L(\text{max})}}{6 \pi f_{\text{line}}} \approx \frac{R_{L(\text{max})}}{942}\text{ Henrys (at } 50\text{ Hz mains)} L c ​ ≥ 3 ω R L ( max ) ​ ​ = 6 π f line ​ R L ( max ) ​ ​ ≈ 942 R L ( max ) ​ ​ Henrys (at 50 Hz mains)

π \pi π -Section (CLC) Filter: Comprises a capacitor-input stage followed by a series choke (or resistor) and a second shunt capacitor. Provides exceptional ripple attenuation ( 40 dB 40\text{ dB} 40 dB to 60 dB 60\text{ dB} 60 dB reduction), making it ideal for low-current audio preamplifiers and receiver local oscillator supplies.

Bleeder Resistors: Connected across the output of filter capacitor banks to discharge stored energy safely upon power-down, and to maintain the minimum critical load current ( I critical I_{\text{critical}} I critical ​ ) in choke-input filters to prevent voltage soaring at no-load.

Linear Voltage Regulators

Linear power supplies utilize an active semiconductor pass element operating in its active/linear region , functioning as a dynamically controlled variable resistor in series with the load. Unregulated Vin ---> C [ NPN pass transistor ] E ---> [R_E] ->+---> Vout / Load

  • B |
  • ^ [R1]
  • | |
  • [Error amplifier] <------ V_fb -------+
  • (+) V_ref (-) V_fb [R2]
  • |
  • GND

The error amplifier drives the base. R E R_E R E ​ is an optional series emitter ballast resistor; R 1 R_1 R 1 ​ and R 2 R_2 R 2 ​ sense the output after it. The load returns to the common ground.

Series-Pass Transistor Architecture

Reference Element: A precision Zener diode or bandgap voltage reference establishes an ultra-stable voltage ( V ref V_{\text{ref}} V ref ​ ).

Sampling Network: A resistive voltage divider ( R 1 , R 2 R_1, R_2 R 1 ​ , R 2 ​ ) samples a fraction of the output voltage: V fb = V out × R 2 / ( R 1 + R 2 ) V_{\text{fb}} = V_{\text{out}} \times R_2 / (R_1 + R_2) V fb ​ = V out ​ × R 2 ​ / ( R 1 ​ + R 2 ​ ) .

Error Amplifier: A high-gain differential op-amp compares V fb V_{\text{fb}} V fb ​ with V ref V_{\text{ref}} V ref ​ .

Negative Feedback Correction: If V out V_{\text{out}} V out ​ drops due to an increased transceiver current demand, V fb V_{\text{fb}} V fb ​ decreases. The error amplifier detects this discrepancy and increases base drive current to the series-pass transistor. The pass transistor conducts more heavily, reducing its collector-to-emitter voltage drop ( V C E V_{CE} V CE ​ ) and restoring V out V_{\text{out}} V out ​ to its precise regulated setpoint.

Three-Terminal Integrated Circuit Regulators

Fixed Regulators (78xx / 79xx Series): Three-terminal ICs delivering fixed positive (7805 = + 5 V = +5\text{ V} = + 5 V , 7812 = + 12 V = +12\text{ V} = + 12 V , 7815 = + 15 V = +15\text{ V} = + 15 V ) or negative (79xx) rails with built-in thermal overload and short-circuit protection.

Adjustable Regulators (LM317): Develops a precise 1.25 V 1.25\text{ V} 1.25 V reference voltage ( V ref V_{\text{ref}} V ref ​ ) between its output and adjustment terminals: V out = 1.25 V ( 1 + R 2 R 1 ) + I adj R 2 V_{\text{out}} = 1.25\text{ V} \left( 1 + \frac{R_2}{R_1} \right) + I_{\text{adj}} R_2 V out ​ = 1.25 V ( 1 + R 1 ​ R 2 ​ ​ ) + I adj ​ R 2 ​

I adj I_{\text{adj}} I adj ​ is typically 50 μ A 50\ \mu\text{A} 50 μ A , with a 100 μ A 100\ \mu\text{A} 100 μ A maximum. Its I adj R 2 I_{\text{adj}}R_2 I adj ​ R 2 ​ contribution is often small, but include it when calculating output accuracy.

Dropout Voltage: The minimum input-to-output differential voltage ( V in − V out V_{\text{in}} - V_{\text{out}} V in ​ − V out ​ ) required across the regulator to maintain stable regulation. For standard linear ICs, dropout is 2.0 V 2.0\text{ V} 2.0 V to 2.5 V 2.5\text{ V} 2.5 V . Low-Dropout (LDO) regulators utilize P-channel MOSFETs or PNP pass transistors to achieve dropout voltages below 0.2 V 0.2\text{ V} 0.2 V to 0.4 V 0.4\text{ V} 0.4 V .

Power Dissipation and Thermal Constraints

The fundamental drawback of linear regulators is low efficiency under high current or large voltage differentials. The series-pass device absorbs the full difference between input and output voltage: P D = ( V in − V out ) × I L P_D = (V_{\text{in}} - V_{\text{out}}) \times I_L P D ​ = ( V in ​ − V out ​ ) × I L ​ Efficiency ( η ) ≈ V out V in × 100 % \text{Efficiency } (\eta) \approx \frac{V_{\text{out}}}{V_{\text{in}}} \times 100\% Efficiency ( η ) ≈ V in ​ V out ​ ​ × 100%

For a 13.8 V 13.8\text{ V} 13.8 V , 20 A 20\text{ A} 20 A linear power supply supplied by an unregulated 20 V 20\text{ V} 20 V DC rail, the pass transistors must dissipate: P D = ( 20 V − 13.8 V ) × 20 A = 6.2 V × 20 A = 124 Watts P_D = (20\text{ V} - 13.8\text{ V}) \times 20\text{ A} = 6.2\text{ V} \times 20\text{ A} = 124\text{ Watts} P D ​ = ( 20 V − 13.8 V ) × 20 A = 6.2 V × 20 A = 124 Watts

This 124 W 124\text{ W} 124 W of continuous waste heat demands massive extruded aluminum heatsinks, thermostatically controlled cooling fans, and multiple paralleled pass transistors (such as three or four 2N3055 power BJTs) fitted with low-value emitter ballast resistors ( 0.1 Ω 0.1\ \Omega 0.1 Ω ) to ensure equal current sharing and prevent current hogging.

Switched-Mode Power Supplies (SMPS)

Switched-Mode Power Supplies can achieve efficiencies of 85 % 85\% 85% to 95 % 95\% 95% by rapidly switching between off and a low-loss on-state . A fully enhanced power MOSFET uses its ohmic region; an IGBT has a low on-state collector-emitter drop. Real devices dissipate conduction and switching-transition losses. +-------------+ +-------------+ +-------------+ +-------------+ +-------------+

  • | 230V Mains |--->| Mains Bridge|--->| High-Voltage|--->| High-Freq |--->| Fast |---> Regulated
  • | AC Input | | Rectifier | | Inverter | | Ferrite | | Schottky | 13.8V DC
  • +-------------+ +-------------+ | (PWM Switch)| | Transformer | | & LC Filter | Output
  • +-------------+ +-------------+ +-------------+
  • ^ |
  • | PWM Feedback Loop |
  • +-------------------------------------+
  • Principles of Operation

Direct Mains Rectification: The incoming 230 V 230\text{ V} 230 V AC mains is rectified directly by a bridge rectifier and smoothed, producing a high-voltage DC bus of approximately 325 V 325\text{ V} 325 V DC ( 230 V × 2 230\text{ V} \times \sqrt{2} 230 V × 2 ​ ).

High-Frequency Inverter: High-voltage power MOSFETs chop this 325 V 325\text{ V} 325 V DC bus into high-frequency pulses at switching frequencies from 50 kHz 50\text{ kHz} 50 kHz to 1 MHz 1\text{ MHz} 1 MHz .

Compact Ferrite Transformer: Higher frequency reduces the volt-seconds applied during each switching interval, allowing fewer turns or a smaller core cross-section for a given flux swing. At 100 kHz 100\text{ kHz} 100 kHz the frequency is 2,000 times 50 Hz 50\text{ Hz} 50 Hz , enabling much smaller magnetics. Core losses, winding current, insulation and cooling also determine size; core volume is not simply proportional to 1 / f 1/f 1/ f .

Secondary Rectification and Filtering: The stepped-down high-frequency AC is rectified with fast Schottky diodes and smoothed by small inductors and low-ESR capacitors.

Pulse-Width Modulation (PWM) Regulation: Feedback regulates the output by adjusting switching duty cycle ( D = t on / T D=t_{\text{on}}/T D = t on ​ / T ). For an ideal forward converter in continuous-conduction mode , the relationship is: V out = D × N s N p × V bus V_{\text{out}} = D \times \frac{N_s}{N_p} \times V_{\text{bus}} V out ​ = D × N p ​ N s ​ ​ × V bus ​

SMPS Topologies

The following buck and boost equations assume ideal components and continuous inductor current; other topologies and discontinuous operation use different relationships.

Buck Converter: Non-isolated step-down converter ( V out = D × V in V_{\text{out}} = D \times V_{\text{in}} V out ​ = D × V in ​ ).

Boost Converter: Non-isolated step-up converter ( V out = V in / ( 1 − D ) V_{\text{out}} = V_{\text{in}} / (1 - D) V out ​ = V in ​ / ( 1 − D ) ).

Half-Bridge / Full-Bridge Converters: Transformer-isolated topologies used in standard high-current amateur station supplies.

RFI Disadvantages and Amateur Station Mitigations

Because SMPS units switch high voltages and currents with extremely fast rise and fall times ( d i / d t di/dt d i / d t and d v / d t dv/dt d v / d t ), they generate intense broadband electromagnetic interference (EMI) and RF switching "hash" spanning 100 kHz 100\text{ kHz} 100 kHz to 100 MHz 100\text{ MHz} 100 MHz :

Conducted and Radiated EMI: Harmonics radiate through the air or conduct out through mains leads and DC power cables.

Mitigations:

Line Filters: Installing common-mode line filters containing bifilar toroidal chokes and Class-X and Class-Y safety capacitors on both AC mains and DC output rails.

Chassis Shielding: Enclosing the power supply in a fully shielded, grounded steel or heavy aluminum enclosure.

Ferrite Suppressors: Clamping snap-on type 31 or 43 ferrite cores over external DC supply cables.

The "Noise Offset" Knob: Specialized amateur radio SMPS units feature a front-panel "Noise Offset" (or frequency shift) control. Turning this potentiometer adjusts the internal oscillator switching frequency slightly (e.g. from 65 kHz 65\text{ kHz} 65 kHz to 68 kHz 68\text{ kHz} 68 kHz ). This shifts the high-order harmonics and receiver "birdies" away from the active receive frequency, moving interference completely out of the receiver passband.

Power Supply Comparison

  • Parameter Linear Power Supply Switched-Mode Power Supply (SMPS)
  • Efficiency Low ( 35 % − 55 % 35\% - 55\% 35% − 55% ) High ( 80 % − 95 % 80\% - 95\% 80% − 95% )

Weight and Dimensions Heavy and bulky (e.g. 10 − 15 kg 10 - 15\text{ kg} 10 − 15 kg for 25 A 25\text{ A} 25 A ) Lightweight and compact (e.g. 1.2 − 2.0 kg 1.2 - 2.0\text{ kg} 1.2 − 2.0 kg for 25 A 25\text{ A} 25 A )

RF Noise (EMI / Hash) Completely silent (zero RF switching hash) High potential for switching noise; requires EMI filtering

Output Ripple Extremely low ( < 2 mV RMS < 2\text{ mV}_\text{RMS} < 2 mV RMS ​ ) Low to moderate ( 10 − 50 mV p-p 10 - 50\text{ mV}_\text{p-p} 10 − 50 mV p-p ​ switching ripple)

Transient Recovery Very fast (microseconds) Moderate (governed by PWM feedback loop)

Transformer Core Heavy laminated silicon iron at 50 Hz 50\text{ Hz} 50 Hz Miniature high-permeability ferrite at 50 kHz − 500 kHz 50\text{ kHz} - 500\text{ kHz} 50 kHz − 500 kHz

Primary Amateur Use High-end base stations, ultra-sensitive low-noise receiving Portable operation, DXpeditions, space-constrained shacks

  • Power Supply Protection Mechanisms Supply + ----[DC fuse]----+----------------------> Load +
  • |
  • A
  • [SCR] <--- Gate drive from over-voltage sensor
  • K
  • |
  • Return ------------------+----------------------> Load -

The sensor monitors the protected output relative to return. The SCR is connected across that output, downstream of the fuse; no wire bypasses the fuse.

1. Over-Voltage Crowbar Circuit

Many amateur transceivers use a nominal 13.8 V 13.8\text{ V} 13.8 V supply; use the particular equipment's permitted voltage range. If a series-pass transistor fails collector-to-emitter short, the unregulated input can reach the output and damage the load.

An over-voltage crowbar responds as follows:

A Zener/reference sensing circuit monitors the output. Select its threshold and tolerances below the load's damaging voltage while allowing normal supply variation.

An over-voltage triggers a high-current SCR connected across the protected output.

The conducting SCR pulls the output down toward its low on-state voltage and diverts fault current from the load.

Coordinated current limiting, a fuse, a breaker or shutdown circuitry then controls or disconnects the fault. Fuse clearing takes time: the SCR must withstand capacitor-discharge and source current, and the complete protection response must meet the load's voltage/time tolerance.

2. Current Limiting Strategies

Constant Current Limiting: If the load current reaches a preset threshold ( I limit I_{\text{limit}} I limit ​ ), the regulator clamps the current to that value while allowing output voltage to drop. However, if a dead short occurs ( V out = 0 V V_{\text{out}} = 0\text{ V} V out ​ = 0 V ), the entire unregulated input voltage appears across the series-pass transistor while conducting I limit I_{\text{limit}} I limit ​ . The transistor dissipates maximum power ( P D = V in × I limit P_D = V_{\text{in}} \times I_{\text{limit}} P D ​ = V in ​ × I limit ​ ), leading to thermal destruction unless heavily over-heatsinked.

Foldback Current Limiting: Senses both output current and output voltage. When an overload occurs, the circuit reduces (folds back) both voltage and current simultaneously . Under a dead short, the output current drops to a small fraction of rated maximum ( I short ≪ I limit I_{\text{short}} \ll I_{\text{limit}} I short ​ ≪ I limit ​ , typically 10 % 10\% 10% to 20 % 20\% 20% of full load). This drastically curtails transistor power dissipation during fault conditions, allowing safe, sustained short-circuit survival.

Reverse Polarity Protection: A diode connected across the protected input, normally reverse-biased, conducts if polarity is reversed. It limits reverse voltage while a coordinated upstream fuse clears or the source current limit operates. The diode must withstand the fault current until protection acts.

  • Worked Engineering Calculations
  • Example 1: Smoothing Capacitor Sizing for an Amateur Power Supply

Problem: An amateur builds a 13.8 V 13.8\text{ V} 13.8 V linear power supply designed to deliver a continuous load current of I L = 20 A I_L = 20\text{ A} I L ​ = 20 A to an HF transceiver. The supply uses a full-wave bridge rectifier fed by a 50 Hz 50\text{ Hz} 50 Hz Australian mains transformer. Calculate:

The fundamental ripple frequency ( f ripple f_{\text{ripple}} f ripple ​ ).

The minimum filter capacitance ( C C C ) required to keep the peak-to-peak ripple voltage below V ripple(p-p) = 1.5 V V_{\text{ripple(p-p)}} = 1.5\text{ V} V ripple(p-p) ​ = 1.5 V .

Solution:

Ripple Frequency: Full-wave bridge rectification rectifies both halves of the 50 Hz 50\text{ Hz} 50 Hz line: f ripple = 2 × f line = 2 × 50 Hz = 100 Hz f_{\text{ripple}} = 2 \times f_{\text{line}} = 2 \times 50\text{ Hz} = 100\text{ Hz} f ripple ​ = 2 × f line ​ = 2 × 50 Hz = 100 Hz

Capacitance Calculation: C = I L f ripple × V ripple(p-p) = 20 A 100 Hz × 1.5 V = 20 150 = 0.1333 Farads C = \frac{I_L}{f_{\text{ripple}} \times V_{\text{ripple(p-p)}}} = \frac{20\text{ A}}{100\text{ Hz} \times 1.5\text{ V}} = \frac{20}{150} = 0.1333\text{ Farads} C = f ripple ​ × V ripple(p-p) ​ I L ​ ​ = 100 Hz × 1.5 V 20 A ​ = 150 20 ​ = 0.1333 Farads C = 133 , 333 μ F C = 133,333\ \mu\text{F} C = 133 , 333 μ F

(Three 47 , 000 μ F 47,000\ \mu\text{F} 47 , 000 μ F capacitors in parallel provide a nominal 141 , 000 μ F 141,000\ \mu\text{F} 141 , 000 μ F . Practical selection must also allow for capacitance tolerance, ripple-current and voltage ratings.)

Example 2: Linear Regulator Thermal Dissipation and Heatsink Requirements

Problem: A 13.8 V 13.8\text{ V} 13.8 V linear power supply draws an unregulated 19.5 V 19.5\text{ V} 19.5 V DC at its filter capacitor output while delivering I L = 15 A I_L = 15\text{ A} I L ​ = 15 A continuous to a VHF FM repeater transmitter.

Calculate the power dissipated as heat in the series-pass transistor bank.

Calculate the electrical efficiency ( η \eta η ) of the power supply stage.

If four 2N3055 transistors share the current equally, calculate the power dissipated per transistor.

Solution:

Total Thermal Dissipation: P D = ( V in − V out ) × I L = ( 19.5 V − 13.8 V ) × 15 A = 5.7 V × 15 A = 85.5 Watts P_D = (V_{\text{in}} - V_{\text{out}}) \times I_L = (19.5\text{ V} - 13.8\text{ V}) \times 15\text{ A} = 5.7\text{ V} \times 15\text{ A} = 85.5\text{ Watts} P D ​ = ( V in ​ − V out ​ ) × I L ​ = ( 19.5 V − 13.8 V ) × 15 A = 5.7 V × 15 A = 85.5 Watts

Power Supply Stage Efficiency: P out = V out × I L = 13.8 V × 15 A = 207.0 Watts P_{\text{out}} = V_{\text{out}} \times I_L = 13.8\text{ V} \times 15\text{ A} = 207.0\text{ Watts} P out ​ = V out ​ × I L ​ = 13.8 V × 15 A = 207.0 Watts P in = V in × I L = 19.5 V × 15 A = 292.5 Watts P_{\text{in}} = V_{\text{in}} \times I_L = 19.5\text{ V} \times 15\text{ A} = 292.5\text{ Watts} P in ​ = V in ​ × I L ​ = 19.5 V × 15 A = 292.5 Watts η = P out P in × 100 % = 207.0 W 292.5 W × 100 % = 70.77 % \eta = \frac{P_{\text{out}}}{P_{\text{in}}} \times 100\% = \frac{207.0\text{ W}}{292.5\text{ W}} \times 100\% = 70.77\% η = P in ​ P out ​ ​ × 100% = 292.5 W 207.0 W ​ × 100% = 70.77%

Dissipation per Transistor: Across four paralleled transistors: P D ( each ) = 85.5 W 4 = 21.38 Watts per transistor P_{D(\text{each})} = \frac{85.5\text{ W}}{4} = 21.38\text{ Watts per transistor} P D ( each ) ​ = 4 85.5 W ​ = 21.38 Watts per transistor

(Each transistor requires low-value emitter ballast resistors, such as 0.1 Ω 0.1\ \Omega 0.1 Ω , and an appropriately rated heatsink to maintain junction temperatures well below the 200 ∘ C 200^\circ\text{C} 20 0 ∘ C maximum rating).