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8.1 BJT Operation, Biasing & Small-Signal Amplifiers
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8.1 BJT Operation, Biasing & Small-Signal Amplifiers
Key Takeaways Explain This Topic AI
Bipolar Junction Transistors (BJTs) operate in three main regions: Cutoff (both junctions reverse-biased), Saturation (both junctions forward-biased), and Active mode (BE junction forward-biased, BC junction reverse-biased for linear amplification).
The fundamental BJT current relationships are I E = I B + I C I_E = I_B + I_C I E = I B + I C , I C = β I B = α I E I_C = \beta I_B = \alpha I_E I C = β I B = α I E , where α = β β + 1 \alpha = \frac{\beta}{\beta + 1} α = β + 1 β and β = α 1 − α \beta = \frac{\alpha}{1 - \alpha} β = 1 − α α .
Voltage-divider biasing provides the highest Q-point stability against variations in β \beta β and temperature, with stability factor S ( I C O ) S(I_{CO}) S ( I CO ) approaching 1 when R B ≪ β R E R_B \ll \beta R_E R B ≪ β R E .
The AC small-signal dynamic emitter resistance is r e = V T I E ≈ 26 mV I E r_e = \frac{V_T}{I_E} \approx \frac{26\text{ mV}}{I_E} r e = I E V T ≈ I E 26 mV , yielding hybrid-pi input resistance r π = ( 1 + β ) r e ≈ β V T I C r_{\pi} = (1+\beta)r_e \approx \frac{\beta V_T}{I_C} r π = ( 1 + β ) r e ≈ I C β V T and transconductance g m = I C V T g_m = \frac{I_C}{V_T} g m = V T I C .
Common Emitter (CE) amplifiers deliver high voltage and current gain with 180° phase inversion; Common Collector (CC) provides high input impedance and unit voltage gain; Common Base (CB) offers low input impedance, high voltage gain, and zero phase shift.
Last updated: July 2026
- 8.1 BJT Operation, Biasing & Small-Signal Amplifiers
- 1. BJT Semiconductor Physics & Operational Modes
A Bipolar Junction Transistor (BJT) is a three-terminal, current-controlled semiconductor device consisting of two back-to-back p n pn p n junctions. The three regions are the Emitter (E) , Base (B) , and Collector (C) .
Construction & Doping Profiles
Emitter (E): Heavily doped ( N E ≫ N B > N C N_E \gg N_B > N_C N E ≫ N B > N C ) to inject maximum majority carriers into the base.
Base (B): Very lightly doped and physically ultra-thin (order of micrometers) to minimize carrier recombination.
Collector (C): Moderately doped and physically largest to collect majority carriers and dissipate heat.
Fundamental Terminal Current & Gain Relations
Summing currents according to Kirchhoff's Current Law (KCL): I E = I B + I C I_E = I_B + I_C I E = I B + I C
Where I C I_C I C comprises the injected collector current and reverse saturation leakage current ( I C B O I_{CBO} I CBO ): I C = α I E + I C B O ≈ α I E I_C = \alpha I_E + I_{CBO} \approx \alpha I_E I C = α I E + I CBO ≈ α I E
Common-Base Current Gain (Alpha, α \alpha α ): Ratio of collector current to emitter current in active mode ( 0.95 ≤ α ≤ 0.999 0.95 \le \alpha \le 0.999 0.95 ≤ α ≤ 0.999 ). α = I C I E \alpha = \frac{I_C}{I_E} α = I E I C
Common-Emitter Current Gain (Beta, β \beta β or h f e h_{fe} h f e ): Ratio of collector current to base current ( 20 ≤ β ≤ 500 20 \le \beta \le 500 20 ≤ β ≤ 500 ). β = I C I B \beta = \frac{I_C}{I_B} β = I B I C
Exact Conversion Formulas: α = β β + 1 , β = α 1 − α \alpha = \frac{\beta}{\beta + 1}, \quad \beta = \frac{\alpha}{1 - \alpha} α = β + 1 β , β = 1 − α α
Thermal Voltage ( V T V_T V T ): Key temperature-dependent parameter defined as V T = k T q V_T = \frac{k T}{q} V T = q k T . At room temperature ( T = 300 K T = 300\text{ K} T = 300 K or 27 ∘ C 27^\circ\text{C} 2 7 ∘ C ): V T ≈ 25.85 mV ≈ 26 mV V_T \approx 25.85\text{ mV} \approx 26\text{ mV} V T ≈ 25.85 mV ≈ 26 mV
BJT Operational Modes
Operational Mode Base-Emitter (BE) Junction Base-Collector (BC) Junction Terminal Voltages (NPN) Primary Application
Cutoff Reverse-Biased Reverse-Biased V B E < 0.7 V , I C ≈ 0 V_{BE} < 0.7\text{ V}, I_C \approx 0 V BE < 0.7 V , I C ≈ 0 Open Switch (Digital OFF)
Forward Active Forward-Biased Reverse-Biased V B E ≈ 0.7 V , V C E > 0.2 V V_{BE} \approx 0.7\text{ V}, V_{CE} > 0.2\text{ V} V BE ≈ 0.7 V , V CE > 0.2 V Linear Small-Signal Amplifier
Saturation Forward-Biased Forward-Biased V B E ≈ 0.7 V , V C E , s a t ≈ 0.2 V V_{BE} \approx 0.7\text{ V}, V_{CE,sat} \approx 0.2\text{ V} V BE ≈ 0.7 V , V CE , s a t ≈ 0.2 V Closed Switch (Digital ON)
Reverse Active Reverse-Biased Forward-Biased V B E < 0 V , V B C > 0 V V_{BE} < 0\text{ V}, V_{BC} > 0\text{ V} V BE < 0 V , V BC > 0 V Low-gain special applications
2. DC Biasing Networks & Q-Point Stabilization
Biasing establishes a stable DC Operating Point (Q-point) defined by ( V C E Q , I C Q ) (V_{CEQ}, I_{CQ}) ( V CEQ , I CQ ) on the transistor characteristic curves. The goal of proper bias design is to maintain the Q-point near the center of the active region AC load line, preventing distortion (clipping) under large signal swings.
- Comparison of BJT Biasing Networks
- A. Fixed-Bias Circuit
- Base Current: I B = V C C − V B E R B I_B = \frac{V_{CC} - V_{BE}}{R_B} I B = R B V CC − V BE
- Collector Current: I C = β I B I_C = \beta I_B I C = β I B
- Collector-Emitter Voltage: V C E = V C C − I C R C V_{CE} = V_{CC} - I_C R_C V CE = V CC − I C R C
Evaluation: Highly unstable Q-point. I C I_C I C depends directly on β \beta β , which varies widely with temperature and manufacturing tolerances.
B. Emitter-Stabilized Bias Circuit
Base Current: I B = V C C − V B E R B + ( 1 + β ) R E I_B = \frac{V_{CC} - V_{BE}}{R_B + (1+\beta)R_E} I B = R B + ( 1 + β ) R E V CC − V BE
Collector Current: I C = β I B I_C = \beta I_B I C = β I B
Collector-Emitter Voltage: V C E = V C C − I C ( R C + R E ) V_{CE} = V_{CC} - I_C(R_C + R_E) V CE = V CC − I C ( R C + R E )
Evaluation: Emitter resistor R E R_E R E provides negative feedback, stabilizing I C I_C I C against β \beta β variations.
C. Voltage-Divider Bias (Voltage-Self Bias)
Thevenin Equivalent Parameters: V T H = V C C ⋅ R 2 R 1 + R 2 , R T H = R 1 ∥ R 2 = R 1 R 2 R 1 + R 2 V_{TH} = V_{CC} \cdot \frac{R_2}{R_1 + R_2}, \quad R_{TH} = R_1 \parallel R_2 = \frac{R_1 R_2}{R_1 + R_2} V T H = V CC ⋅ R 1 + R 2 R 2 , R T H = R 1 ∥ R 2 = R 1 + R 2 R 1 R 2
Exact Analysis: I B = V T H − V B E R T H + ( 1 + β ) R E , I C = β I B , V C E = V C C − I C ( R C + R E ) I_B = \frac{V_{TH} - V_{BE}}{R_{TH} + (1+\beta)R_E}, \quad I_C = \beta I_B, \quad V_{CE} = V_{CC} - I_C(R_C + R_E) I B = R T H + ( 1 + β ) R E V T H − V BE , I C = β I B , V CE = V CC − I C ( R C + R E )
Approximate Analysis Criterion: Valid when β R E ≥ 10 R 2 \beta R_E \ge 10 R_2 β R E ≥ 10 R 2 : V B ≈ V C C ⋅ R 2 R 1 + R 2 , V E = V B − V B E , I C ≈ I E = V E R E V_B \approx V_{CC} \cdot \frac{R_2}{R_1 + R_2}, \quad V_E = V_B - V_{BE}, \quad I_C \approx I_E = \frac{V_E}{R_E} V B ≈ V CC ⋅ R 1 + R 2 R 2 , V E = V B − V BE , I C ≈ I E = R E V E Notice that I C is completely independent of β ! \text{Notice that } I_C \text{ is completely independent of } \beta! Notice that I C is completely independent of β !
D. Collector-Feedback Bias
Base Current: I B = V C C − V B E R B + β ( R C + R E ) I_B = \frac{V_{CC} - V_{BE}}{R_B + \beta(R_C + R_E)} I B = R B + β ( R C + R E ) V CC − V BE
Collector-Emitter Voltage: V C E = V C C − ( I C + I B ) R C ≈ V C C − I C R C V_{CE} = V_{CC} - (I_C + I_B)R_C \approx V_{CC} - I_C R_C V CE = V CC − ( I C + I B ) R C ≈ V CC − I C R C
Stability Factors
Stability factor S ( I C O ) S(I_{CO}) S ( I CO ) measures the sensitivity of I C I_C I C to changes in reverse saturation current I C O I_{CO} I CO : S ( I C O ) = ∂ I C ∂ I C O = ( 1 + β ) 1 + R B / R E 1 + β + R B / R E S(I_{CO}) = \frac{\partial I_C}{\partial I_{CO}} = (1+\beta) \frac{1 + R_B/R_E}{1 + \beta + R_B/R_E} S ( I CO ) = ∂ I CO ∂ I C = ( 1 + β ) 1 + β + R B / R E 1 + R B / R E
Ideal stability occurs when S ( I C O ) → 1 S(I_{CO}) \to 1 S ( I CO ) → 1 , achieved when R B / R E ≪ 1 R_B / R_E \ll 1 R B / R E ≪ 1 .
For Fixed Bias: S ( I C O ) = 1 + β S(I_{CO}) = 1 + \beta S ( I CO ) = 1 + β (worst stability).
For Voltage Divider Bias with R T H ≪ β R E R_{TH} \ll \beta R_E R T H ≪ β R E : S ( I C O ) ≈ 1 S(I_{CO}) \approx 1 S ( I CO ) ≈ 1 (best stability).
3. Small-Signal AC Modeling & Transistor Equivalent Circuits
Under small-signal AC operation, the transistor is replaced by a linear equivalent circuit model.
AC Dynamic Emitter Resistance ( r e r_e r e )
Derived from the ideal diode equation at the forward-biased BE junction: r e = V T I E Q ≈ 26 mV I E Q r_e = \frac{V_T}{I_{EQ}} \approx \frac{26\text{ mV}}{I_{EQ}} r e = I EQ V T ≈ I EQ 26 mV
Hybrid- π \pi π Model Parameters
Input Resistance ( r π r_{\pi} r π ): Resistance looking into the base with emitter grounded. r π = ( 1 + β ) r e = β V T I C Q r_{\pi} = (1+\beta)r_e = \frac{\beta V_T}{I_{CQ}} r π = ( 1 + β ) r e = I CQ β V T
Transconductance ( g m g_m g m ): Ratio of AC collector current to AC base-emitter voltage. g m = I C Q V T = 1 r e g_m = \frac{I_{CQ}}{V_T} = \frac{1}{r_e} g m = V T I CQ = r e 1
Output Resistance ( r o r_o r o ): Represents Early Effect (base-width modulation with Early voltage V A V_A V A ). r o = V A + V C E Q I C Q ≈ V A I C Q r_o = \frac{V_A + V_{CEQ}}{I_{CQ}} \approx \frac{V_A}{I_{CQ}} r o = I CQ V A + V CEQ ≈ I CQ V A
- 4. Single-Stage BJT Amplifier Configurations
- A. Common Emitter (CE) Amplifier (Bypassed R E R_E R E )
Input Impedance: Z i n = R 1 ∥ R 2 ∥ β r e Z_{in} = R_1 \parallel R_2 \parallel \beta r_e Z in = R 1 ∥ R 2 ∥ β r e
Output Impedance: Z o u t = R C ∥ r o ≈ R C Z_{out} = R_C \parallel r_o \approx R_C Z o u t = R C ∥ r o ≈ R C
No-Load Voltage Gain: A v = − R C r e = − g m R C A_v = -\frac{R_C}{r_e} = -g_m R_C A v = − r e R C = − g m R C
Loaded Voltage Gain: A v L = − R C ∥ R L r e A_{vL} = -\frac{R_C \parallel R_L}{r_e} A vL = − r e R C ∥ R L
Phase Relationship: 180 ∘ 180^\circ 18 0 ∘ phase inversion between input and output.
B. Common Emitter with Unbypassed Emitter Resistor ( R E R_E R E )
Input Impedance: Z i n ( b a s e ) = β ( r e + R E ) ≈ β R E Z_{in(base)} = \beta(r_e + R_E) \approx \beta R_E Z in ( ba se ) = β ( r e + R E ) ≈ β R E
Voltage Gain: A v ≈ − R C ∥ R L R E A_v \approx -\frac{R_C \parallel R_L}{R_E} A v ≈ − R E R C ∥ R L
Benefit: Gain is independent of r e r_e r e and temperature, though magnitude is reduced.
C. Common Collector (CC) Amplifier / Emitter Follower
Input Impedance: Z i n = R 1 ∥ R 2 ∥ [ β ( r e + R E ∥ R L ) ] ≈ R 1 ∥ R 2 ∥ β ( R E ∥ R L ) Z_{in} = R_1 \parallel R_2 \parallel [\beta (r_e + R_E \parallel R_L)] \approx R_1 \parallel R_2 \parallel \beta (R_E \parallel R_L) Z in = R 1 ∥ R 2 ∥ [ β ( r e + R E ∥ R L )] ≈ R 1 ∥ R 2 ∥ β ( R E ∥ R L )
Output Impedance: Z o u t = R E ∥ ( r e + R T H β ) Z_{out} = R_E \parallel \left(r_e + \frac{R_{TH}}{\beta}\right) Z o u t = R E ∥ ( r e + β R T H )
Voltage Gain: A v = R E ∥ R L r e + ( R E ∥ R L ) ≈ + 1 A_v = \frac{R_E \parallel R_L}{r_e + (R_E \parallel R_L)} \approx +1 A v = r e + ( R E ∥ R L ) R E ∥ R L ≈ + 1
Phase Relationship: 0 ∘ 0^\circ 0 ∘ phase shift (in-phase follower).
Primary Application: Impedance matching buffer (High Z i n Z_{in} Z in , Low Z o u t Z_{out} Z o u t ).
D. Common Base (CB) Amplifier
Input Impedance: Z i n = R E ∥ r e ≈ r e Z_{in} = R_E \parallel r_e \approx r_e Z in = R E ∥ r e ≈ r e (Very low, 10 − 50 Ω 10-50\ \Omega 10 − 50 Ω )
- Output Impedance: Z o u t ≈ R C Z_{out} \approx R_C Z o u t ≈ R C
- Voltage Gain: A v = + R C ∥ R L r e A_v = +\frac{R_C \parallel R_L}{r_e} A v = + r e R C ∥ R L
- Current Gain: A i ≈ α ≈ 1 A_i \approx \alpha \approx 1 A i ≈ α ≈ 1
Phase Relationship: 0 ∘ 0^\circ 0 ∘ phase shift.
Primary Application: High-frequency RF amplifiers (no Miller effect on C b c C_{bc} C b c ).